EXPLORE YOUR NEXT CHAPTER
Stage - FPGA Automation & Flow Optimization f/m - Strategic Student Program
Siemens
Source: Headcount Labs · original listing ↗
Job data: Headcount Labs, ODbL 1.0. Job descriptions belong to their employers.
Source date: 10/30/2026
About this role
Job Family: Software Req ID: 526935 Company Overview Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. Start your career with the Strategic Student Program (SSP) The Strategic Student Program is our formal internship program globally. You will be mentored by guides and gain invaluable professional experience. At Siemens, SSP interns get access to an international student network and community, career development opportunities with professional growth pathways, comprehensive practical training throughout the program, access to the Siemens Learning Hub and other training materials, and the opportunity to collaborate on exciting projects within a global, diverse team. Topic: FPGA Automation & Flow Optimization. Position Overview We are seeking a motivated student intern to contribute to an advanced engineering project focused on accelerating FPGA implementation timelines. In this 5-to-6-month internship, you will explore the capabilities of modern EDA tool scaling and flow optimization using AMD Vivado Dynamic Function eXchange (DFX). Your primary mission will be to study advanced native Vivado features, analyze academic methodologies for build-time reduction, and engineer a robust automation script that optimizes implementation workflows to compile independent logic modules in parallel. This project bridges digital design with software automation, allowing you to build an interesting, high-performance use case that pushes the limits of modern parallel compilation flows. Key Responsibilities + State-of-the-Art Research: Review academic and industry literature regarding advanced compile-time reduction methodologies and modular compilation flows in modern FPGA tools. + Design & Flow Architecture: Implement a synthetic benchmark application designed to evaluate the physical routing and timing overheads of independent modular implementation. + Automation Development: Develop an automated, Non-Project Mode Tcl and Python scripting pipeline to manage global system infrastructure, resolve module boundary timing constraints, and export isolated checkpoints. + Parallel Execution Orchestration: Engineer a multi-process background execution harness (via Tcl or Python subprocesses) that concurrently spawns independent Vivado instances to compile separate logic modules simultaneously. + Benchmarking & Evaluation: Collect and analyze performance metrics comparing standard monolithic compilation flows against your parallel DFX framework, focusing on build times, RAM utilization, and final timing closure results. + Documentation & Delivery: Package the scripting framework into a clean internal repository with a final technical report detailing your findings and methodology. This 6-month internship is based in Meudon (Paris area, France) and starts from February 2027. Qualifications Currently pursuing higher education in engineering (BAC+5) in France, with a focus on electrical engineering, computer engineering, computer science, or a closely related field. + FPGA Tools & Flow: Good understanding of FPGA design flows and hands-on experience using AMD Vivado for synthesis and implementation. + Automation & Scripting: Strong scripting capabilities in Tcl and/or Python, and familiarity with executing EDA tools via batch or command-line interfaces. + Digital Design Foundations: Proficiency in HDL (Verilog/SystemVerilog or VHDL) along with a basic grasp of timing constraints (XDC) and static timing analysis. + Fluent in both French and English, enabling effective team collaboration. + Ability to work autonomously as well as collaboratively with mentors and team members. Why Us At Siemens Software, flexibility is how we work—hybrid by default, built on trust and autonomy. Together, 30,000 people across more than 200 countries build technology that shapes the real world. You will grow through real projects, strong technical peers, and global mobility, backed by the scale and benefits of an industrial software leader. We're committed to equality and inclusion, and we hire based on merit, skills, and impact. Bring your curiosity and creativity and help us shape tomorrow! Diversity & Inclusion We value equal opportunities and welcome applications from all talented individuals. At Siemens, we believe people who've had real experiences dealing with being different will excel as leaders. Let's foster a culture of creativity and innovation. We are an equal opportunity employer and do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. Internship stipend This Strategic Student Program internship offers a gross monthly stipend of 1,200€ plus meal vouchers. Additional benefits include access to the Siemens Learning Hub, professional development opportunities, and mentorship from experienced professionals. Siemens Software. Transform the Everyday SSP LI-EDA LI-Onsite LI-MN1 Organization: Digital Industries Job Type: Full-time Category: Internal Services